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DATE
2007
IEEE
146views Hardware» more  DATE 2007»
16 years 1 months ago
Data-flow transformations using Taylor expansion diagrams
Abstract: An original technique to transform functional representation of the design into a structural representation in form of a data flow graph (DFG) is described. A canonical,...
Maciej J. Ciesielski, Serkan Askar, Daniel Gomez-P...
DATE
2007
IEEE
89views Hardware» more  DATE 2007»
16 years 1 months ago
Cyclostationary feature detection on a tiled-SoC
In this paper, a two-step methodology is introduced to analyse the mapping of Cyclostationary Feature Detection (CFD) onto a multi-core processing platform. In the first step, th...
André B. J. Kokkeler, Gerard J. M. Smit, Th...
DATE
2007
IEEE
167views Hardware» more  DATE 2007»
16 years 1 months ago
A decomposition-based constraint optimization approach for statically scheduling task graphs with communication delays to multip
We present a decomposition strategy to speed up constraint optimization for a representative multiprocessor scheduling problem. In the manner of Benders decomposition, our techniq...
Nadathur Satish, Kaushik Ravindran, Kurt Keutzer
DATE
2007
IEEE
119views Hardware» more  DATE 2007»
16 years 1 months ago
Experimental evaluation of protections against laser-induced faults and consequences on fault modeling
Lasers can be used by hackers to situations to inject faults in circuits and induce security flaws. On-line detection mechanisms are classically proposed to counter such attacks, ...
Régis Leveugle, Abdelaziz Ammari, V. Maingo...
DATE
2006
IEEE
176views Hardware» more  DATE 2006»
16 years 1 months ago
Low power synthesis of dynamic logic circuits using fine-grained clock gating
— Clock power consumes a significant fraction of total power dissipation in high speed precharge/evaluate logic styles. In this paper, we present a novel low-cost design methodol...
Nilanjan Banerjee, Kaushik Roy, Hamid Mahmoodi-Mei...