2778 search results - page 416 / 556 » Reuse Technique in Hardware Design |
185
Voted
TAICPART
2006
IEEE
16 years 1 months ago
2006
IEEE
Model checking has proven to be an effective technology for verification and debugging in hardware and more recently in software domains. With the proliferation of multicore arch...
164
Voted
ISLPED
2004
ACM
16 years 13 days ago
2004
ACM
Dynamic voltage scaling (DVS) is a well-known low-power design technique for embedded real-time systems. Because of its effectiveness on energy reduction, several variable voltag...
174
Voted
FPL
2004
Springer
16 years 11 days ago
2004
Springer
A previous study [1] demonstrates the advantages of replacing registers by FPGA embedded memories during the storage allocation phase of High-Level Synthesis. The trend in new FPGA...
194
Voted
RT
2004
Springer
16 years 10 days ago
2004
Springer
This paper proposes a new shadow map technique termed trapezoidal shadow maps to calculate high quality shadows in real-time applications. To address the resolution problem of the...
216
Voted
PVG
2003
IEEE
16 years 8 days ago
2003
IEEE
A number of problems are well suited for volumetric representation for both simulation and storage, however, the large amount of data that needs to be processed and rendered with ...