2778 search results - page 424 / 556 » Reuse Technique in Hardware Design |
139
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ISCAS
2005
IEEE
16 years 17 days ago
2005
IEEE
This paper presents novel low-voltage high order single loop sigma-delta modulator structures for wideband applications. The proposed architectures employ the technique of double-...
174
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WORDS
2005
IEEE
16 years 16 days ago
2005
IEEE
Reliable program Worst-Case Execution Time (WCET) estimates are a key component when designing and verifying real-time systems. One way to derive such estimates is by static WCET ...
155
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ASPDAC
2005
ACM
16 years 16 days ago
2005
ACM
- Domino logic is used extensively in high speed microprocessor datapath design. Although domino gates have small propagation delay, they consume relatively more power. We propose ...
178
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ISLPED
2005
ACM
16 years 16 days ago
2005
ACM
The instruction scheduling logic used in modern superscalar microprocessors often relies on associative searching of the issue queue entries to dynamically wakeup instructions for...
152
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FPL
2005
Springer
16 years 15 days ago
2005
Springer
This work explores the effect of adding a timing driven functional decomposition step to the traditional field programmable gate array (FPGA) CAD flow. Once placement has comple...