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» Reuse Technique in Hardware Design
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DAC
2005
ACM
16 years 8 months ago
FPGA technology mapping: a study of optimality
This paper attempts to quantify the optimality of FPGA technology mapping algorithms. We develop an algorithm, based on Boolean satisfiability (SAT), that is able to map a small s...
Andrew C. Ling, Deshanand P. Singh, Stephen Dean B...
FPGA
2009
ACM
188views FPGA» more  FPGA 2009»
16 years 1 months ago
Clock power reduction for virtex-5 FPGAs
Clock network power in field-programmable gate arrays (FPGAs) is considered and two complementary approaches for clock power reduction in the Xilinx R VirtexTM -5 FPGA are presen...
Qiang Wang, Subodh Gupta, Jason Helge Anderson
FPGA
2009
ACM
154views FPGA» more  FPGA 2009»
16 years 1 months ago
Synthesis of reconfigurable high-performance multicore systems
Reconfigurable high-performance computing systems (RHPC) have been attracting more and more attention over the past few years. RHPC systems are a promising solution for accelerati...
Jason Cong, Karthik Gururaj, Guoling Han
163
Voted
AHS
2006
IEEE
148views Hardware» more  AHS 2006»
16 years 1 months ago
Adaptive Micro-Antenna on Silicon Substrate
Adaptive antenna technology represents the most advanced smart antenna approach to date. Using a variety of new signal-processing algorithms, the adaptive system takes advantage o...
Nakul Haridas, Ahmet T. Erdogan, Tughrul Arslan, M...
175
Voted
ISLPED
2006
ACM
103views Hardware» more  ISLPED 2006»
16 years 27 days ago
Low power light-weight embedded systems
Light-weight embedded systems are now gaining more popularity due to the recent technological advances in fabrication that have resulted in more powerful tiny processors with grea...
Majid Sarrafzadeh, Foad Dabiri, Roozbeh Jafari, Ta...