2778 search results - page 435 / 556 » Reuse Technique in Hardware Design |
190
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SARA
2009
Springer
16 years 1 months ago
2009
Springer
: Given a system design (SD), a key task is to optimize this design to reduce the probability of catastrophic failures. We consider the task of redesigning an SD to minimize the pr...
194
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CODES
2005
IEEE
16 years 17 days ago
2005
IEEE
Majority of existing works on system level power estimation have focused on the processor, while there are very few that address power consumption of peripherals in a SoC. With th...
190
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CODES
2005
IEEE
16 years 17 days ago
2005
IEEE
This paper presents a novel approach for multiprocess synthesis supporting well-tailored module integration at system level. The goal is to extend the local scope of existing arch...
153
Voted
FPL
2005
Springer
16 years 14 days ago
2005
Springer
This paper describes a method based on polynomial approximation for transferring ROM resources used in FPGA designs to multiplication and addition operations. The technique can be...
159
Voted
FPL
2003
Springer
16 years 5 days ago
2003
Springer
In this paper we present a single-chip FPGA full encryptor/decryptor core design of the AES algorithm. Our design performs all of them, encryption, decryption and key scheduling pr...