2778 search results - page 447 / 556 » Reuse Technique in Hardware Design |
164
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MICRO
2005
IEEE
16 years 14 days ago
2005
IEEE
The performance of a dynamic optimization system depends heavily on the code it selects to optimize. Many current systems follow the design of HP Dynamo and select a single interp...
188
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ISLPED
2005
ACM
16 years 13 days ago
2005
ACM
Concerns about the reliability of real-time embedded systems that employ dynamic voltage scaling has recently been highlighted [1,2,3], focusing on transient-fault-tolerance techn...
151
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ASYNC
2003
IEEE
16 years 5 days ago
2003
IEEE
The lack of proven mechanisms for transferring data between multiple synchronous islands has been a major impediment for applying globally asynchronous locally synchronous (GALS) ...
176
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ICCAD
2003
IEEE
16 years 5 days ago
2003
IEEE
This paper proposes for latency insensitive systems a performance optimization technique called channel buffer queue sizing, which is performed after relay station insertion in th...
206
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ISCA
2003
IEEE
16 years 4 days ago
2003
IEEE
This work examines dynamic cluster assignment for a clustered trace cache processor (CTCP). Previously proposed cluster assignment techniques run into unique problems as issue wid...