2778 search results - page 452 / 556 » Reuse Technique in Hardware Design |
164
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ASPDAC
1998
ACM
15 years 11 months ago
1998
ACM
ABSTRACT - This paper presents a new design flow, FPDSiMPA, and a set of techniques for synthesizing high-performance sub-half micron logic circuits. FPD-SiMPA consists of logic p...
167
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ISLPED
1997
ACM
15 years 11 months ago
1997
ACM
In this paper we present a methodology and techniques for generating cycle-accurate macro-models for RTlevel power analysis. The proposed macro-model predicts not only...
166
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ICCAD
1994
IEEE
15 years 11 months ago
1994
IEEE
- This paper addresses the problem of true delay estimation during high level design. The existing delay estimation techniques either estimate the topological delay of the circuit ...
188
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ASPLOS
1992
ACM
15 years 11 months ago
1992
ACM
The foremost goal of superscalar processor design is to increase performance through the exploitation of instruction-level parallelism (ILP). Previous studies have shown that spec...
193
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SIGMETRICS
1993
ACM
15 years 11 months ago
1993
ACM
As disk arrays become widely used, tools for understanding and analyzing their performance become increasingly important. In particular, performance models can be invaluable in bo...