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» Reuse Technique in Hardware Design
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ICCD
2004
IEEE
138views Hardware» more  ICCD 2004»
16 years 3 months ago
A Novel Low-Power Scan Design Technique Using Supply Gating
— Reduction in test power is important to improve battery life in portable devices employing periodic self-test, to increase reliability of testing and to reduce test-cost. In sc...
Swarup Bhunia, Hamid Mahmoodi-Meimand, Saibal Mukh...
ISCAS
2005
IEEE
122views Hardware» more  ISCAS 2005»
16 years 7 days ago
Towards a rigorous formulation of the space mapping technique for engineering design
—This paper deals with the Space Mapping (SM) approach to engineering design optimization. We attempt here a theoretical justification of methods that have already proven efficie...
Slawomir Koziel, John W. Bandler, Kaj Madsen
IIE
2008
88views more  IIE 2008»
15 years 6 months ago
Development of Generative Learning Objects Using Feature Diagrams and Generative Techniques
Abstract. Learning Objects (LOs) play a key role for supporting eLearning. In general, however, the development of LOs remains a vague issue, because there is still no clearly defi...
Vytautas Stuikys, Robertas Damasevicius
FPGA
2004
ACM
120views FPGA» more  FPGA 2004»
16 years 1 days ago
Flexibility measurement of domain-specific reconfigurable hardware
Traditional metrics used to compare hardware designs include area, performance, and power. However, these metrics do not form a complete evaluation of reconfigurable hardware. For...
Katherine Compton, Scott Hauck
ASPDAC
2006
ACM
109views Hardware» more  ASPDAC 2006»
16 years 19 days ago
Cycle error correction in asynchronous clock modeling for cycle-based simulation
— As the complexity of SoCs is increasing, hardware/software co-verification becomes an important part of system verification. C-level cycle-based simulation could be an efficien...
Junghee Lee, Joonhwan Yi