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ISCAS
2006
IEEE
163views Hardware» more  ISCAS 2006»
16 years 1 months ago
ASIC hardware implementation of the IDEA NXT encryption algorithm
— Symmetric-key block ciphers are often used to provide data confidentiality with low complexity, especially in the case of dedicated hardware implementations. IDEA NXT is a nov...
Marco Macchetti, Wenyu Chen
SIPS
2006
IEEE
16 years 1 months ago
Partly Parallel Overlapped Sum-Product Decoder Architectures for Quasi-Cyclic LDPC Codes
Abstract— In this paper, we propose partly parallel architectures based on optimal overlapped sum-product (OSP) decoding. To ensure high throughput and hardware utilization effi...
Ning Chen, Yongmei Dai, Zhiyuan Yan
ACSAC
2005
IEEE
16 years 24 days ago
We Need Assurance!
When will we be secure? Nobody knows for sure – but it cannot happen before commercial security products and services possess not only enough functionality to satisfy customers...
Brian D. Snow
DATE
2005
IEEE
169views Hardware» more  DATE 2005»
16 years 24 days ago
Design Optimization of Time-and Cost-Constrained Fault-Tolerant Distributed Embedded Systems
In this paper we present an approach to the design optimization of faulttolerant embedded systems for safety-critical applications. Processes are statically scheduled and communic...
Viacheslav Izosimov, Paul Pop, Petru Eles, Zebo Pe...
DATE
2005
IEEE
118views Hardware» more  DATE 2005»
16 years 24 days ago
Energy- and Performance-Driven NoC Communication Architecture Synthesis Using a Decomposition Approach
In this paper, we present a methodology for customized communication architecture synthesis that matches the communication requirements of the target application. This is an impor...
Ümit Y. Ogras, Radu Marculescu