Cache memories have been extensively used to bridge the gap between high speed processors and relatively slower main memories. However, they are sources of predictability problems...
This tutorial focuses on advanced techniques to cope with the complexity of designing modern digital chips which are complete systems often containing multiple processors, complex...
Meeting deadlines is a key requirement in safe realtime systems. Worst-case execution times (WCET) of tasks are needed for safe planning. Contemporary worst-case timing analysis t...
Routers are expected to play an important role in the IPbased wireless data network. Although a substantial number of techniques have been proposed to improve wireless network per...
Petros Zerfos, Gary Zhong, Jerry Cheng, Haiyun Luo...
ion of Clocks in Synchronous Data-flow Systems Albert Cohen1 , Louis Mandel2 , Florence Plateau2 , and Marc Pouzet23 1 INRIA Saclay - Ile-de-France, Orsay, France 2 LRI, Univ. Pari...
Albert Cohen, Louis Mandel, Florence Plateau, Marc...