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ISCAS
2005
IEEE
141views Hardware» more  ISCAS 2005»
16 years 18 days ago
Convergence analysis of a background interstage gain calibration technique for pipelined ADCs
A mathematical framework for the convergence analysis of a pipelined ADC with background gain calibration is presented. The constraints on adaptation step size for mean convergenc...
Dong Wang, J. P. Keane, Paul J. Hurst, Bernard C. ...
ISVLSI
2005
IEEE
113views VLSI» more  ISVLSI 2005»
16 years 18 days ago
Balancing System Level Pipelines with Stage Voltage Scaling
This paper presents an approach to dynamically balance the pipeline by scaling the stage supply voltages. Simulation results show that by such an approach about 50% improvement in...
Hui Guo, Sri Parameswaran
GECCO
2004
Springer
127views Optimization» more  GECCO 2004»
16 years 12 days ago
Automatic Synthesis of an 802.11a Wireless LAN Antenna Using Genetic Programming A Real World Application
This paper describes the application of genetic programming to synthesize a small form factor, 2 dimensional wire antenna for a 5.2 GHz 802.11a wireless LAN application. Utilizing ...
Rian Sanderson
ISCAS
2003
IEEE
103views Hardware» more  ISCAS 2003»
16 years 9 days ago
A massively scaleable decoder architecture for low-density parity-check codes
A massively scalable architecture for decoding low-density parity-check codes is presented in this paper. This novel architecture uses hardware scaling and memory partitioning to ...
Anand Selvarathinam, Gwan Choi, Krishna Narayanan,...
CONTEXT
2003
Springer
16 years 7 days ago
Explanation as Contextual Categorization
Our concern is the explanation generation in a representation based on contextual categorization. We point out that the explicit consideration of the context is necessary for the g...
Leslie Ganet, Patrick Brézillon, Charles Ti...