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SIGCSE
2010
ACM
232views Education» more  SIGCSE 2010»
16 years 2 months ago
Design and evaluation of a computer science and engineering course for middle school girls
A significant focus in the United States recently has been to increase engagement and interest in STEM curricula, particularly among girls and underrepresented minorities [3]. In ...
Gabriela Marcu, Samuel J. Kaufman, Jaihee Kate Lee...
NOCS
2007
IEEE
16 years 1 months ago
On the Design of a Photonic Network-on-Chip
Recent remarkable advances in nanoscale siliconphotonic integrated circuitry specifically compatible with CMOS fabrication have generated new opportunities for leveraging the uni...
Assaf Shacham, Keren Bergman, Luca P. Carloni
CODES
2006
IEEE
16 years 1 months ago
A bus architecture for crosstalk elimination in high performance processor design
In deep sub-micron technology, the crosstalk effect between adjacent wires has become an important issue, especially between long on-chip buses. This effect leads to the increas...
Wen-Wen Hsieh, Po-Yuan Chen, TingTing Hwang
GLVLSI
2006
IEEE
185views VLSI» more  GLVLSI 2006»
16 years 1 months ago
Application of fast SOCP based statistical sizing in the microprocessor design flow
In this paper we have applied statistical sizing in an industrial setting. Efficient implementation of the statistical sizing algorithm is achieved by utilizing a dedicated interi...
Murari Mani, Mahesh Sharma, Michael Orshansky
153
Voted
ASPDAC
2006
ACM
95views Hardware» more  ASPDAC 2006»
16 years 1 months ago
The design and implementation of a low-latency on-chip network
— Many of the issues that will be faced by the designers of multi-billion transistor chips may be alleviated by the presence of a flexible global communication infrastructure. I...
Robert D. Mullins, Andrew West, Simon W. Moore