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» Simulation of Soliton Circuits
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DAC
2007
ACM
15 years 10 months ago
SBPOR: Second-Order Balanced Truncation for Passive Order Reduction of RLC Circuits
RLC circuits have been shown to be better formulated as second-order systems instead of first-order systems. The corresponding model order reduction techniques for secondorder sys...
Boyuan Yan, Sheldon X.-D. Tan, Pu Liu, Bruce McGau...
ISLPED
2009
ACM
168views Hardware» more  ISLPED 2009»
16 years 1 months ago
Low power circuit design based on heterojunction tunneling transistors (HETTs)
The theoretical lower limit of subthreshold swing in MOSFETs (60 mV/decade) significantly restricts low voltage operation since it results in a low ON to OFF current ratio at low ...
Daeyeon Kim, Yoonmyung Lee, Jin Cai, Isaac Lauer, ...
TVLSI
2008
110views more  TVLSI 2008»
15 years 6 months ago
Thermal Switching Error Versus Delay Tradeoffs in Clocked QCA Circuits
Abstract--The quantum-dot cellular automata (QCA) model offers a novel nano-domain computing architecture by mapping the intended logic onto the lowest energy configuration of a co...
Sanjukta Bhanja, Sudeep Sarkar
DAC
2004
ACM
16 years 7 months ago
A scalable soft spot analysis methodology for compound noise effects in nano-meter circuits
Circuits using nano-meter technologies are becoming increasingly vulnerable to signal interference from multiple noise sources as well as radiation-induced soft errors. One way to...
Chong Zhao, Xiaoliang Bai, Sujit Dey
ICCD
2008
IEEE
165views Hardware» more  ICCD 2008»
16 years 3 months ago
Analysis and minimization of practical energy in 45nm subthreshold logic circuits
Abstract— Over the last decade, the design of ultra-lowpower digital circuits in subthreshold regime has been driven by the quest for minimum energy per operation. In this contri...
David Bol, Renaud Ambroise, Denis Flandre, Jean-Di...