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ISLPED
2004
ACM
153views Hardware» more  ISLPED 2004»
16 years 2 days ago
Any-time probabilistic switching model using bayesian networks
Modeling and estimation of switching activities remain to be important problems in low-power design and fault analysis. A probabilistic Bayesian Network based switching model can ...
Shiva Shankar Ramani, Sanjukta Bhanja
ICCAD
1995
IEEE
110views Hardware» more  ICCAD 1995»
15 years 10 months ago
Fast functional simulation using branching programs
This paper addresses the problem of speeding up functional (delayindependent)logic simulation for synchronousdigital systems. The problem needs very little new motivation – cycl...
Pranav Ashar, Sharad Malik
GLVLSI
2003
IEEE
186views VLSI» more  GLVLSI 2003»
15 years 12 months ago
A fast simulation approach for inductive effects of VLSI interconnects
Modeling on-chip inductive effects for interconnects of multigigahertz microprocessors remains challenging. SPICE simulation of these effects is very slow because of the large num...
Xiaoning Qi, Goetz Leonhardt, Daniel Flees, Xiao-D...
ICCAD
2002
IEEE
108views Hardware» more  ICCAD 2002»
16 years 3 months ago
A precorrected-FFT method for simulating on-chip inductance
The simulation of on-chip inductance using PEEC-based circuit analysis methods often requires the solution of a subproblem where an extracted inductance matrix must be multiplied ...
Haitian Hu, David Blaauw, Vladimir Zolotov, Kaushi...
GLVLSI
2003
IEEE
175views VLSI» more  GLVLSI 2003»
15 years 12 months ago
A custom FPGA for the simulation of gene regulatory networks
We present a unique FPGA that uses a mix of digital and large-signal analog computation for the simulation of gene regulatory networks. The prototype IC consists of a 4x5 array of...
Ilias Tagkopoulos, Charles A. Zukowski, German Cav...