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177
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ISCA
2002
IEEE
127views Hardware» more  ISCA 2002»
16 years 15 days ago
The Optimum Pipeline Depth for a Microprocessor
The impact of pipeline length on the performance of a microprocessor is explored both theoretically and by simulation. An analytical theory is presented that shows two opposing ar...
Allan Hartstein, Thomas R. Puzak
181
Voted
ISSS
2002
IEEE
130views Hardware» more  ISSS 2002»
16 years 15 days ago
System-Level Modeling of a Network Switch SoC
We present the modeling of the high-level design of a next generation network switch from the perspective of a ComputerAided Design (CAD) team within the larger context of a desig...
Andrew S. Cassidy, Christopher P. Andrews, Donald ...
309
Voted
ISSS
2002
IEEE
194views Hardware» more  ISSS 2002»
16 years 15 days ago
Managing Dynamic Concurrent Tasks in Embedded Real-Time Multimedia Systems
This paper addresses the problem of mapping an application, which is highly dynamic in the future, onto a heterogeneous multiprocessor platform in an energy efficient way. A two-p...
Rudy Lauwereins, Chun Wong, Paul Marchal, Johan Vo...
ISSS
2002
IEEE
125views Hardware» more  ISSS 2002»
16 years 15 days ago
Design Experience of a Chip Multiprocessor Merlot and Expectation to Functional Verification
We have fabricated a Chip Multiprocessor prototype code-named Merlot to proof our novel speculative multithreading architecture. On Merlot, multiple threads provide wider issue wi...
Satoshi Matsushita
235
Voted
ISSS
2002
IEEE
141views Hardware» more  ISSS 2002»
16 years 15 days ago
An Accelerated Datapath Width Optimization Scheme for Area Reduction of Embedded Systems
Datapath width optimization is very effective for reducing the area of a custom-made embedded system. The trivial way of optimization is to iteratively customize, evaluate, and r...
Hiroto Yasuura, Yun Cao, Mohammad Mesbah Uddin
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