Sciweavers

27913 search results - page 5221 / 5583
» Simulation
Sort
View
CODES
1999
IEEE
15 years 11 months ago
How standards will enable hardware/software co-design
o much higher levels of abstraction than today's design practices, which are usually at the level of synthesizable RTL for custom hardware or Instruction Set Simulator (ISS) f...
Mark Genoe, Christopher K. Lennard, Joachim Kunkel...
DAC
1999
ACM
15 years 11 months ago
Cycle and Phase Accurate DSP Modeling and Integration for HW/SW Co-Verification
We present our practical experience in the modeling and integration of cycle/phase-accurate instruction set architecture (ISA) models of digital signal processors (DSPs) with othe...
Lisa M. Guerra, Joachim Fitzner, Dipankar Talukdar...
DATE
1999
IEEE
120views Hardware» more  DATE 1999»
15 years 11 months ago
Hardware Synthesis from C/C++ Models
Software programming languages, such as C/C++, have been used as means for specifying hardware for quite a while. Different design methodologies have exploited the advantages of f...
Giovanni De Micheli
SIGCOMM
1999
ACM
15 years 11 months ago
An Integrated Congestion Management Architecture for Internet Hosts
This paper presents a novel framework for managing network congestion from an end-to-end perspective. Our work is motivated by several trends in traffic patterns that threaten th...
Hari Balakrishnan, Hariharan Shankar Rahul, Sriniv...
SIGCOMM
1999
ACM
15 years 11 months ago
Load-Sensitive Routing of Long-Lived IP Flows
Internet service providers face a daunting challenge in provisioning network resources, due to the rapid growth of the Internet and wide fluctuations in the underlying traffic pa...
Anees Shaikh, Jennifer Rexford, Kang G. Shin
« Prev « First page 5221 / 5583 Last » Next »