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DATE
2010
IEEE
166views Hardware» more  DATE 2010»
16 years 19 days ago
From transistors to MEMS: Throughput-aware power gating in CMOS circuits
—In this paper we study the effectiveness of two power gating methods – transistor switches and MEMS switches – in reducing the power consumption of a design with a certain t...
Michael B. Henry, Leyla Nazhandali
IEEEPACT
2002
IEEE
16 years 14 days ago
Using the Compiler to Improve Cache Replacement Decisions
Memory performance is increasingly determining microprocessor performance and technology trends are exacerbating this problem. Most architectures use set-associative caches with L...
Zhenlin Wang, Kathryn S. McKinley, Arnold L. Rosen...
HCW
2000
IEEE
15 years 12 months ago
Heterogeneity as Key Feature of High Performance Computing: the PQE1 Prototype
In this work we present the results of a project aimed at assembling an hybrid massively parallel machine, the PQE1 prototype, devoted to the simulation of complex physical models...
Paolo Palazzari, Lidia Arcipiani, Massimo Celino, ...
DSOM
1999
Springer
15 years 11 months ago
Integrating Service and Network Management Components for Service Fulfilment
: Solutions in the network and service management layers of telecommunications management architectures are currently fragmented both in terms of standards and products. It is ofte...
David Lewis, Chris Malbon, George Pavlou, Costas S...
EUROMICRO
1998
IEEE
15 years 11 months ago
The Latency Hiding Effectiveness of Decoupled Access/Execute Processors
Several studies have demonstrated that out-of-order execution processors may not be the most adequate organization for wide issue processors due to the increasing penalties that w...
Joan-Manuel Parcerisa, Antonio González