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DAC
2005
ACM
15 years 9 months ago
Mapping statistical process variations toward circuit performance variability: an analytical modeling approach
A physical yet compact gate delay model is developed integrating short-channel effects and the Alpha-power law based timing model. This analytical approach accurately predicts bot...
Yu Cao, Lawrence T. Clark
225
Voted
ERSA
2007
177views Hardware» more  ERSA 2007»
15 years 9 months ago
Energy-Aware System Synthesis for Reconfigurable Chip Multiprocessors
- Even though state-of-the-art FPGAs present new opportunities in exploring low-cost high-performance architectures for floating-point scientific applications, they also pose serio...
Xiaofang Wang, Sotirios G. Ziavras, Jie Hu
GEOINFO
2003
15 years 9 months ago
GMLA: A XML Schema for Integration and Exchange of Multidimensional-Geographical Data
The integration among DW, OLAP and GIS has been given considerable attention in recent years by many researchers and industrial corporations. This may be a result of: 1) DW/OLAP ca...
Robson do Nascimento Fidalgo, Joel da Silva, Val&e...
DAC
2010
ACM
15 years 7 months ago
Post-silicon diagnosis of segments of failing speedpaths due to manufacturing variations
We study diagnosis of segments on speedpaths that fail the timing constraint at the post-silicon stage due to manufacturing variations. We propose a formal procedure that is appli...
Lin Xie, Azadeh Davoodi, Kewal K. Saluja
CPHYSICS
2008
86views more  CPHYSICS 2008»
15 years 7 months ago
On ERI sorting for SIMD execution of large-scale Hartree-Fock SCF
Given the resurgent attractiveness of single-instruction-multiple-data (SIMD) processing, it is important for high-performance computing applications to be SIMD-capable. The Hartr...
Tirath Ramdas, Gregory K. Egan, David Abramson, Ki...