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DAC
2005
ACM
16 years 8 months ago
Power-aware placement
Lowering power is one of the greatest challenges facing the IC industry today. We present a power-aware placement method that simultaneously performs (1) activity-based register c...
Yongseok Cheon, Pei-Hsin Ho, Andrew B. Kahng, Sher...
DAC
2005
ACM
16 years 8 months ago
IODINE: a tool to automatically infer dynamic invariants for hardware designs
We describe IODINE, a tool to automatically extract likely design properties using dynamic analysis. A practical bottleneck in the formal verification of hardware designs is the n...
Sudheendra Hangal, Naveen Chandra, Sridhar Narayan...
DAC
2006
ACM
16 years 8 months ago
Symmetry detection for large Boolean functions using circuit representation, simulation, and satisfiability
- Classical two-variable symmetries play an important role in many EDA applications, ranging from logic synthesis to formal verification. This paper proposes a complete circuit-bas...
Jin S. Zhang, Alan Mishchenko, Robert K. Brayton, ...
WWW
2008
ACM
16 years 8 months ago
Plurality: a context-aware personalized tagging system
We present the design of Plurality,1 an interactive tagging system. Plurality's modular architecture allows users to automatically generate high-quality tags over Web content...
Robert Graham, Brian Eoff, James Caverlee
VLSID
2005
IEEE
132views VLSI» more  VLSID 2005»
16 years 7 months ago
Influence of Leakage Reduction Techniques on Delay/Leakage Uncertainty
One of the main challenges for design in the presence of process variations is to cope with the uncertainties in delay and leakage power. In this paper, the influence of leakage r...
Yuh-Fang Tsai, Narayanan Vijaykrishnan, Yuan Xie, ...