Sciweavers

3507 search results - page 514 / 702
» Slicing for architectural analysis
Sort
View
DATE
2004
IEEE
107views Hardware» more  DATE 2004»
15 years 11 months ago
A Partitioning Methodology for Accelerating Applications in Hybrid Reconfigurable Platforms
In this paper, we propose a methodology for partitioning and mapping computational intensive applications in reconfigurable hardware blocks of different granularity. A generic hyb...
Michalis D. Galanis, Athanasios Milidonis, George ...
DAS
2006
Springer
15 years 11 months ago
Combining Multiple Classifiers for Faster Optical Character Recognition
Traditional approaches to combining classifiers attempt to improve classification accuracy at the cost of increased processing. They may be viewed as providing an accuracy-speed tr...
Kumar Chellapilla, Michael Shilman, Patrice Simard
CODES
2001
IEEE
15 years 10 months ago
Embedded UML: a merger of real-time UML and co-design
In this paper, we present a proposal for a UML profile called `Embedded UML'. Embedded UML represents a synthesis of various ideas in the real-time UML community, and concept...
Grant Martin, Luciano Lavagno, Jean Louis-Guerin
EWSPT
1995
Springer
15 years 10 months ago
Experiments in Process Interface Descriptions, Visualizations and Analyses
A wide variety of techniques and approaches are needed to understand and improve software development processes. The critical research problem is supporting the move from completel...
David C. Carr, Ashok Dandekar, Dewayne E. Perry
IRREGULAR
1995
Springer
15 years 10 months ago
Run-Time Parallelization of Irregular DOACROSS Loops
Dependencies between iterations of loop structures cannot always be determined at compile-time because they may depend on input data which is known only at run-time. A prime examp...
V. Prasad Krothapalli, Thulasiraman Jeyaraman, Mar...