This paper discusses the architecture and performance studies of Datacenter Optical Switch (DOS) designed for scalable and highthroughput interconnections within a data center. DO...
Xiaohui Ye, Yawei Yin, S. J. Ben Yoo, Paul Vincent...
— This paper describes an architecture and FPGA synthesis toolchain for building specialized, energy-saving coprocessors called Irregular Code Energy Reducers (ICERs) for a wide ...
Manish Arora, Jack Sampson, Nathan Goulding-Hotta,...
Multiprocessors based on processors with multiple cores usually include a non-uniform memory architecture (NUMA); even current 2-processor systems with 8 cores exhibit non-uniform...
Exploiting today’s multiprocessors requires highperformance and correct concurrent systems code (optimising compilers, language runtimes, OS kernels, etc.), which in turn requir...
Susmit Sarkar, Peter Sewell, Jade Alglave, Luc Mar...
In this paper, we consider a non-saturated IEEE 802.11 based wireless network. We use a three-way fixed point to model the node behavior with Bernoulli packet arrivals and determi...