Sciweavers

130 search results - page 21 / 26
» Software Pipelined Execution of Stream Programs on GPUs
Sort
View
CASES
2006
ACM
15 years 10 months ago
Power efficient branch prediction through early identification of branch addresses
Ever increasing performance requirements have elevated deeply pipelined architectures to a standard even in the embedded processor domain, requiring the incorporation of dynamic b...
Chengmo Yang, Alex Orailoglu
EUROSYS
2011
ACM
14 years 10 months ago
Symbolic crosschecking of floating-point and SIMD code
We present an effective technique for crosschecking an IEEE 754 floating-point program and its SIMD-vectorized version, implemented in KLEE-FP, an extension to the KLEE symbolic ...
Peter Collingbourne, Cristian Cadar, Paul H. J. Ke...
FCCM
2011
IEEE
241views VLSI» more  FCCM 2011»
14 years 10 months ago
Multilevel Granularity Parallelism Synthesis on FPGAs
— Recent progress in High-Level Synthesis (HLS) es has helped raise the abstraction level of FPGA programming. However implementation and performance evaluation of the HLS-genera...
Alexandros Papakonstantinou, Yun Liang, John A. St...
ANCS
2007
ACM
15 years 10 months ago
Ruler: high-speed packet matching and rewriting on NPUs
Programming specialized network processors (NPU) is inherently difficult. Unlike mainstream processors where architectural features such as out-of-order execution and caches hide ...
Tomas Hruby, Kees van Reeuwijk, Herbert Bos
MOMPES
2006
IEEE
16 years 12 days ago
Model-Driven Development of Real-Time Systems with UML 2.0 and C
In this era of intense liking to automation in almost all time-critical fields, real-time systems have got widespread utilization in industrial, commercial, medical, space and mil...
Mohammad Ullah Khan, Kurt Geihs, Felix Gutbrodt, P...