Sciweavers

5622 search results - page 629 / 1125
» Solving architectural modelling problems using knowledge
Sort
View
DAC
2005
ACM
15 years 9 months ago
Total power reduction in CMOS circuits via gate sizing and multiple threshold voltages
Minimizing power consumption is one of the most important objectives in IC design. Resizing gates and assigning different Vt’s are common ways to meet power and timing budgets. ...
Feng Gao, John P. Hayes
ICPR
2004
IEEE
16 years 8 months ago
Kernel Autoassociator with Applications to Visual Classification
Autoassociator is an important issue in concept learning, and the learned concept of a particular class can be used to distinguish the class from the others. For nonlinear autoass...
Bailing Zhang, Haihong Zhang, Weimin Huang, Zhiyon...
IPPS
2005
IEEE
16 years 1 months ago
Job Allocation Schemes in Computational Grids Based on Cost Optimization
In this paper we propose two price-based job allocation schemes for computational grids. A grid system tries to solve problems submitted by various grid users by allocating the jo...
Satish Penmatsa, Anthony T. Chronopoulos
ISPD
1999
ACM
94views Hardware» more  ISPD 1999»
15 years 12 months ago
Gate sizing with controlled displacement
- In this paper, we present an algorithm for gate sizing with controlled displacement to improve the overall circuit timing. We use a path-based delay model to capture the timing c...
Wei Chen, Cheng-Ta Hsieh, Massoud Pedram
CVPR
2007
IEEE
16 years 9 months ago
Trajectory Association across Non-overlapping Moving Cameras in Planar Scenes
The ability to associate objects across multiple views allows co-operative use of an ensemble cameras for scene understanding. In this paper, we present a principled solution to o...
Yaser Sheikh, Xin Li, Mubarak Shah