214 search results - page 8 / 43 » Speeding up power estimation of embedded software |
182
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CODES
2008
IEEE
15 years 6 months ago
2008
IEEE
With power becoming a major constraint for multi-processor embedded systems, it is becoming important for designers to characterize and model processor power dissipation. It is cr...
152
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FPL
2003
Springer
15 years 12 months ago
2003
Springer
This paper introduces the notion of a software decelerator, to be used in logic-centric system architectures. Functions are offloaded from logic to a processor, accepting a speed ...
171
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TCAD
1998
15 years 6 months ago
1998
In this paper, we present a probabilistic simulation technique to estimate the power consumption of a cmos circuit under a general delay model. This technique is based on the noti...
198
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ASAP
1997
IEEE
15 years 10 months ago
1997
IEEE
This paper reviews a set of techniques for compiling dataflow-based, graphical programs for embedded signal processing applications into efficient implementations on programmable ...
190
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FCCM
2006
IEEE
16 years 20 days ago
2006
IEEE
In this paper, we investigate a combination of two techniques — instruction coding and instruction re-ordering — for optimizing energy in embedded processor control. We presen...