306 search results - page 44 / 62 » Statistical Delay Modeling in Logic Design and Synthesis |
179
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DAC
2008
ACM
16 years 7 months ago
2008
ACM
A fundamental problem in timing-driven physical synthesis is the reduction of critical paths in a design. In this work, we propose a powerful new technique that moves (and can als...
184
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TCAD
2008
15 years 6 months ago
2008
Power consumption has emerged as the premier and most constraining aspect in modern microprocessor and application-specific designs. Gate sizing has been shown to be one of the mos...
169
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ASAP
2004
IEEE
15 years 10 months ago
2004
IEEE
Decreasing feature sizes allow additional functionality to be added to future microprocessors to improve the performance of important application domains. As a result of rapid gro...
168
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ASAP
2005
IEEE
16 years 4 days ago
2005
IEEE
With continued reductions in feature size, additional functionality may be added to future microprocessors to boost the performance of important application domains. Due to growth...
164
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ACSC
2004
IEEE
15 years 10 months ago
2004
IEEE
Fuzzy logic is a natural basis for modelling and solving problems involving imprecise knowledge and continuous systems. Unfortunately, fuzzy logic systems are invariably static (o...