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» Stochastic Bounds on Execution Times of Parallel Computation...
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179
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IPPS
2007
IEEE
16 years 1 months ago
Power-Aware Speedup
Power-aware processors operate in various power modes to reduce energy consumption with a corresponding decrease in peak processor throughput. Recent work has shown power-aware cl...
Rong Ge, Kirk W. Cameron
ISHPC
2000
Springer
15 years 10 months ago
Implementation and Evaluation of OpenMP for Hitachi SR8000
This paper describes the implementation and evaluation of the OpenMP compiler designed for the Hitachi SR8000 Super Technical Server. The compiler performs parallelization for the ...
Yasunori Nishitani, Kiyoshi Negishi, Hiroshi Ohta,...
199
Voted
ICA3PP
2005
Springer
16 years 14 days ago
Data Distribution Strategies for Domain Decomposition Applications in Grid Environments
Abstract. In this paper, we evaluate message-passing applications in Grid environments using domain decomposition technique. We compare two domain decomposition strategies: a balan...
Beatriz Otero, José M. Cela, Rosa M. Badia,...
188
Voted
DATE
2010
IEEE
107views Hardware» more  DATE 2010»
16 years 4 days ago
Worst case delay analysis for memory interference in multicore systems
Abstract—Employing COTS components in real-time embedded systems leads to timing challenges. When multiple CPU cores and DMA peripherals run simultaneously, contention for access...
Rodolfo Pellizzoni, Andreas Schranzhofer, Jian-Jia...
186
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ICS
2009
Tsinghua U.
16 years 1 months ago
Adagio: making DVS practical for complex HPC applications
Power and energy are first-order design constraints in high performance computing. Current research using dynamic voltage scaling (DVS) relies on trading increased execution time...
Barry Rountree, David K. Lowenthal, Bronis R. de S...