5159 search results - page 232 / 1032 » Structural Testing of Executables |
192
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ITC
2003
IEEE
16 years 10 days ago
2003
IEEE
In a scan-based system with a large number of flip-flops, a major component of power is consumed during scanshift and clocking operation in test mode. In this paper, a novel scan-...
187
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ITC
2003
IEEE
16 years 10 days ago
2003
IEEE
The use of AC coupled interconnects to provide communication paths between devices is increasing. The existing IEEE 1149.1 boundary scan standard [1] (JTAG) has limitations that h...
165
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ESA
1993
Springer
15 years 11 months ago
1993
Springer
A digraph is upward planar if it has a planar drawing such that all the edges are monotone with respect to the vertical direction. Testing upward planarity and constructing upward ...
195
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GLVLSI
2002
IEEE
16 years 10 hour ago
2002
IEEE
Design simplification is becoming necessary to respect the target time-to-market of SoCs, and this goal can be obtained by using predesigned IP-cores. However, their correct inte...
215
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CCS
2008
ACM
15 years 9 months ago
2008
ACM
We describe the design and implementation of Privacy Oracle, a system that reports on application leaks of user information via the network traffic that they send. Privacy Oracle ...