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IEEEPACT
2006
IEEE
16 years 1 months ago
Testing implementations of transactional memory
Transactional memory is an attractive design concept for scalable multiprocessors because it offers efficient lock-free synchronization and greatly simplifies parallel software....
Chaiyasit Manovit, Sudheendra Hangal, Hassan Chafi...
CHI
2010
ACM
16 years 5 days ago
FrameWire: a tool for automatically extracting interaction logic from paper prototyping tests
Paper prototyping offers unique affordances for interface design. However, due to its spontaneous nature and the limitations of paper, it is difficult to distill and communicate a...
Yang Li, Xiang Cao, Katherine Everitt, Morgan Dixo...
SAC
2008
ACM
15 years 6 months ago
A hybrid software-based self-testing methodology for embedded processor
Software-based self-test (SBST) is emerging as a promising technology for enabling at-speed testing of high-speed embedded processors testing in an SoC system. For SBST, test rout...
Tai-Hua Lu, Chung-Ho Chen, Kuen-Jong Lee
NPAR
2006
ACM
16 years 1 months ago
Real-time watercolor illustrations of plants using a blurred depth test
We present techniques to create convincing high-quality watercolor illustrations of plants. Mainly focusing on the real-time rendering, we introduce methods to abstract the visual...
Thomas Luft, Oliver Deussen
170
Voted
ATS
2005
IEEE
139views Hardware» more  ATS 2005»
16 years 21 days ago
Shannon Expansion Based Supply-Gated Logic for Improved Power and Testability
— Structural transformation of a design to enhance its testability while satisfying design constraints on power and performance, can result in improved test cost and test confid...
Swaroop Ghosh, Swarup Bhunia, Kaushik Roy