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BMCBI
2008
133views more  BMCBI 2008»
15 years 7 months ago
A Web-based and Grid-enabled dChip version for the analysis of large sets of gene expression data
Background: Microarray techniques are one of the main methods used to investigate thousands of gene expression profiles for enlightening complex biological processes responsible f...
Luca Corradi, Marco Fato, Ivan Porro, Silvia Scagl...
HIPEAC
2007
Springer
16 years 1 months ago
Fetch Gating Control Through Speculative Instruction Window Weighting
In a dynamic reordering superscalar processor, the front-end fetches instructions and places them in the issue queue. Instructions are then issued by the back-end execution core. T...
Hans Vandierendonck, André Seznec
DATE
2002
IEEE
84views Hardware» more  DATE 2002»
16 years 12 days ago
Highly Scalable Dynamically Reconfigurable Systolic Ring-Architecture for DSP Applications
Microprocessors are today getting more and more inefficient for a growing range of applications. Its principles -The Von Neumann paradigm[3]- based on the sequential execution of ...
Gilles Sassatelli, Lionel Torres, Pascal Benoit, T...
IANDC
2006
77views more  IANDC 2006»
15 years 7 months ago
Lower and upper bounds on obtaining history independence
Abstract. History independent data structures, presented by Micciancio, are data structures that possess a strong security property: even if an intruder manages to get a copy of th...
Niv Buchbinder, Erez Petrank
ASPLOS
2009
ACM
16 years 8 months ago
CTrigger: exposing atomicity violation bugs from their hiding places
Multicore hardware is making concurrent programs pervasive. Unfortunately, concurrent programs are prone to bugs. Among different types of concurrency bugs, atomicity violation bu...
Soyeon Park, Shan Lu, Yuanyuan Zhou