Sciweavers

5159 search results - page 396 / 1032
» Structural Testing of Executables
Sort
View
GLVLSI
2008
IEEE
140views VLSI» more  GLVLSI 2008»
16 years 2 months ago
A table-based method for single-pass cache optimization
Due to the large contribution of the memory subsystem to total system power, the memory subsystem is highly amenable to customization for reduced power/energy and/or improved perf...
Pablo Viana, Ann Gordon-Ross, Edna Barros, Frank V...
189
Voted
SC
2004
ACM
16 years 28 days ago
Performance Evaluation of Task Pools Based on Hardware Synchronization
A task-based execution provides a universal approach to dynamic load balancing for irregular applications. Tasks are arbitrary units of work that are created dynamically at runtim...
Ralf Hoffmann, Matthias Korch, Thomas Rauber
193
Voted
EUROPAR
2009
Springer
16 years 4 days ago
Capturing and Visualizing Event Flow Graphs of MPI Applications
A high-level understanding of how an application executes and which performance characteristics it exhibits is essential in many areas of high performance computing, such as applic...
Karl Fürlinger, David Skinner
DAC
1999
ACM
15 years 12 months ago
Common-Case Computation: A High-Level Technique for Power and Performance Optimization
This paper presents a design methodology, called common-case computation (CCC), and new design automation algorithms for optimizing power consumption or performance. The proposed ...
Ganesh Lakshminarayana, Anand Raghunathan, Kamal S...
HPCA
1999
IEEE
15 years 11 months ago
Improving CC-NUMA Performance Using Instruction-Based Prediction
We propose Instruction-based Prediction as a means to optimize directory-based cache coherent NUMA shared-memory. Instruction-based prediction is based on observing the behavior o...
Stefanos Kaxiras, James R. Goodman