114 search results - page 16 / 23 » Sub-threshold design: the challenges of minimizing circuit e... |
167
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CODES
2007
IEEE
16 years 1 months ago
2007
IEEE
In this paper we present an approach to the scheduling and voltage scaling of low-power fault-tolerant hard real-time applications mapped on distributed heterogeneous embedded sys...
196
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DAC
2007
ACM
16 years 7 months ago
2007
ACM
Minimizing power consumption is vitally important in embedded system design; power consumption determines battery lifespan. Ultralow-power designs may even permit embedded systems...
172
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DAC
2008
ACM
16 years 7 months ago
2008
ACM
This paper discusses the use of networks-on-chip (NoCs) consisting of multiple voltage-frequency islands to cope with power consumption, clock distribution and parameter variation...
146
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ISLPED
2006
ACM
16 years 19 days ago
2006
ACM
In a few technology generations, limitations of fabrication processes will make accurate design time power estimates a daunting challenge. Static leakage current which comprises a...
172
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ISPD
2009
ACM
16 years 1 months ago
2009
ACM
The multiple-supply voltage (MSV) design style has been extensively applied to mitigate dynamic-power consumption. The MSV design paradigm, however, brings many crucial challenges...