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ASPDAC
1999
ACM
100views Hardware» more  ASPDAC 1999»
15 years 11 months ago
Node Sampling Technique to Speed Up Probability-Based Power Estimation Methods
We propose a new technique called node sampling to speed up the probability-based power estimation methods. It samples and processes only a small portion of total nodes to estimat...
Hoon Choi, Hansoo Kim, In-Cheol Park, Seung Ho Hwa...
ISLPED
1999
ACM
131views Hardware» more  ISLPED 1999»
15 years 11 months ago
Challenges in clockgating for a low power ASIC methodology
Gating the clock is an important technique used in low power design to disable unused modules of a circuit. Gating can save power by both preventing unnecessary activiiy in the lo...
David Garrett, Mircea R. Stan, Alvar Dean
ISLPED
1999
ACM
91views Hardware» more  ISLPED 1999»
15 years 11 months ago
Stochastic modeling of a power-managed system: construction and optimization
-- The goal of a dynamic power management policy is to reduce the power consumption of an electronic system by putting system components into different states, each representing ce...
Qinru Qiu, Qing Wu, Massoud Pedram
MSE
1999
IEEE
118views Hardware» more  MSE 1999»
15 years 11 months ago
Training IP Creators and Integrators
Intellectual property IP blocks are being created for reuse and marketed as a means of reducing the development time of complex designs. This in turn leads to a reduction in time ...
Donald W. Bouldin, Senthil Natarajan, Benjamin A. ...
FPL
1999
Springer
147views Hardware» more  FPL 1999»
15 years 11 months ago
Synthia: Synthesis of Interacting Automata Targeting LUT-based FPGAs
This paper details the development, implementation, and results of Synthia, a system for the synthesis of Finite State Machines (FSMs) to field-programmable logic. Our approach us...
George A. Constantinides, Peter Y. K. Cheung, Wayn...