507 search results - page 72 / 102 » Testing implementations of transactional memory |
175
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HPDC
2008
IEEE
16 years 27 days ago
2008
IEEE
Advances in virtualization technology have focused mainly on strengthening the isolation barrier between virtual machines (VMs) that are co-resident within a single physical machi...
139
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ISLPED
2004
ACM
15 years 12 months ago
2004
ACM
This paper presents a technique called “workload decomposition” in which the CPU workload is decomposed in two parts: on-chip and off-chip. The on-chip workload signifies the ...
188
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BMCBI
2010
15 years 6 months ago
2010
Background: In recent years, the demand for computational power in computational biology has increased due to rapidly growing data sets from microarray and other high-throughput t...
180
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VLSISP
2002
15 years 6 months ago
2002
Large-grain synchronous dataflow graphs or multi-rate graphs have the distinct feature that the nodes of the dataflow graph fire at different rates. Such multi-rate large-grain dat...
198
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ADC
2008
Springer
16 years 24 days ago
2008
Springer
This article describes how to implement efficient memory resident path indexes for semi-structured data. Two techniques are introduced, and they are shown to be significantly fas...