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MJ
2006
89views more  MJ 2006»
15 years 7 months ago
RTDT: A static QoS manager, RT scheduling, HW/SW partitioning CAD tool
The Hardware (HW)/Software (SW) partitioning/scheduling relies on two subtasks : the cost function and the real time (RT) analysis. Besides these two subtasks, the proposed generi...
Hedi Tmar, Jean-Philippe Diguet, Abdenour Azzedine...
XPU
2009
Springer
15 years 11 months ago
XP Workshop on Agile Product Line Engineering
Software Product Line Engineering (SPLE) promises to lower the costs of developing individual applications as they heavily reuse existing artifacts. Besides decreasing costs, softw...
Yaser Ghanam, Kendra Cooper, Pekka Abrahamsson, Fr...
DFT
2008
IEEE
82views VLSI» more  DFT 2008»
16 years 1 months ago
Selective Hardening of NanoPLA Circuits
Nanoelectronic components are expected to suffer from very high error rates, implying the need for hardening techniques. We propose a fine-grained approach to harden a promising...
Ilia Polian, Wenjing Rao
CF
2005
ACM
15 years 9 months ago
An efficient wakeup design for energy reduction in high-performance superscalar processors
In modern superscalar processors, the complex instruction scheduler could form the critical path of the pipeline stages and limit the clock cycle time. In addition, complex schedu...
Kuo-Su Hsiao, Chung-Ho Chen
FSE
1997
Springer
131views Cryptology» more  FSE 1997»
15 years 11 months ago
Fast Software Encryption: Designing Encryption Algorithms for Optimal Software Speed on the Intel Pentium Processor
Most encryption algorithms are designed without regard to their performance on top-of-the-line microprocessors. This paper discusses general optimization principles algorithms desi...
Bruce Schneier, Doug Whiting