The Hardware (HW)/Software (SW) partitioning/scheduling relies on two subtasks : the cost function and the real time (RT) analysis. Besides these two subtasks, the proposed generi...
Software Product Line Engineering (SPLE) promises to lower the costs of developing individual applications as they heavily reuse existing artifacts. Besides decreasing costs, softw...
Yaser Ghanam, Kendra Cooper, Pekka Abrahamsson, Fr...
Nanoelectronic components are expected to suffer from very high error rates, implying the need for hardening techniques. We propose a fine-grained approach to harden a promising...
In modern superscalar processors, the complex instruction scheduler could form the critical path of the pipeline stages and limit the clock cycle time. In addition, complex schedu...
Most encryption algorithms are designed without regard to their performance on top-of-the-line microprocessors. This paper discusses general optimization principles algorithms desi...