4190 search results - page 230 / 838 » The Cost of Design |
222
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TSP
2008
15 years 7 months ago
2008
This paper presents a systematic high-speed VLSI implementation of the discrete wavelet transform (DWT) based on hardware-efficient parallel FIR filter structures. High-speed 2-D D...
188
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DATE
2007
IEEE
16 years 1 months ago
2007
IEEE
The ability to guarantee the functional correctness of digital integrated circuits and, in particular, complex microprocessors, is a key task in the production of secure and trust...
200
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GECCO
2007
Springer
16 years 1 months ago
2007
Springer
In this paper, we propose a new approach that consists of the extended compact genetic algorithm (ECGA) and split-ondemand (SoD), an adaptive discretization technique, to economic...
193
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CHES
2006
Springer
15 years 11 months ago
2006
Springer
A novel portable hardware architecture of the Elliptic Curve Method of factoring, designed and optimized for application in the relation collection step of the Number Field Sieve,...
177
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FPL
2003
Springer
16 years 14 days ago
2003
Springer
In this paper we present a single-chip FPGA full encryptor/decryptor core design of the AES algorithm. Our design performs all of them, encryption, decryption and key scheduling pr...