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ISCIS
2009
Springer
16 years 2 months ago
Halftoning soft cores for low-cost digital displays
This paper presents hardware design of a family of soft cores that improve image quality on low cost digital displaying devices with limited color palette. The twoelement half-toni...
Muhammet Erkoc, Arda Yurdakul
DATE
2005
IEEE
111views Hardware» more  DATE 2005»
15 years 9 months ago
MINLP Based Topology Synthesis for Delta Sigma Modulators Optimized for Signal Path Complexity, Sensitivity and Power Consumptio
This paper proposes a novel architecture synthesis algorithm for single-loop single-bit ∆Σ modulators. We defined a generic modulator architecture and derived its noise and si...
Hua Tang, Ying Wei, Alex Doboli
202
Voted
DATE
2010
IEEE
110views Hardware» more  DATE 2010»
16 years 16 days ago
An RDL-configurable 3D memory tier to replace on-chip SRAM
—In a conventional SoC designs, on-chip memories occupy more than the 50% of the total die area. 3D technology enables the distribution of logic and memories on separate stacked ...
Marco Facchini, Paul Marchal, Francky Catthoor, Wi...
ESM
1998
15 years 8 months ago
Hardware Modelling and Simulation Using an Object-Oriented Method
In order to reduce the cost, the time-to-market and to make the most pertinent choices, it becomes essential to allow designers to evaluate, very soon in the design phase, a given...
Frédéric Mallet, Fernand Boér...
ASPLOS
2009
ACM
16 years 2 months ago
Architectural implications of nanoscale integrated sensing and computing
This paper explores the architectural implications of integrating computation and molecular probes to form nanoscale sensor processors (nSP). We show how nSPs may enable new compu...
Constantin Pistol, Christopher Dwyer, Alvin R. Leb...