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DSN
2011
IEEE
14 years 7 months ago
LLS: Cooperative integration of wear-leveling and salvaging for PCM main memory
Phase change memory (PCM) has emerged as a promising technology for main memory due to many advan­ tages, such as better scalability, non-volatility and fast read access. However,...
Lei Jiang, Yu Du, Youtao Zhang, Bruce R. Childers,...
CODES
2005
IEEE
16 years 1 months ago
High-level synthesis for large bit-width multipliers on FPGAs: a case study
In this paper, we present the analysis, design and implementation of an estimator to realize large bit width unsigned integer multiplier units. Larger multiplier units are require...
Gang Quan, James P. Davis, Siddhaveerasharan Devar...
CHI
2009
ACM
16 years 8 months ago
Tilt techniques: investigating the dexterity of wrist-based input
Most studies on tilt based interaction can be classified as point-designs that demonstrate the utility of wrist-tilt as an input medium; tilt parameters are tailored to suit the s...
Mahfuz Rahman, Sean Gustafson, Pourang Irani, Srir...
CHI
2006
ACM
16 years 8 months ago
Urbanhermes: social signaling with electronic fashion
Fashion signals are displayed to indicate access to information. Consistent, timely, and meaningful signal displays are only made possible if one is well-connected. While fashion ...
Christine M. Liu, Judith S. Donath
VLSID
2005
IEEE
102views VLSI» more  VLSID 2005»
16 years 8 months ago
Integrated On-Chip Storage Evaluation in ASIP Synthesis
An Application Specific Instruction Set Processor (ASIP) exploits special characteristics of the given application(s) to meet the desired performance, cost and power requirements....
Manoj Kumar Jain, M. Balakrishnan, Anshul Kumar