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» The Expressive Rate of Constraints
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DATE
2005
IEEE
154views Hardware» more  DATE 2005»
16 years 25 days ago
Top-Down Design of a Low-Power Multi-Channel 2.5-Gbit/s/Channel Gated Oscillator Clock-Recovery Circuit
We present a complete top-down design of a low-power multi-channel clock recovery circuit based on gated current-controlled oscillators. The flow includes several tools and method...
Paul Muller, Armin Tajalli, Seyed Mojtaba Atarodi,...
ISCAS
2005
IEEE
144views Hardware» more  ISCAS 2005»
16 years 24 days ago
Event-based imaging with active illumination in sensor networks
— We discuss a distributed imaging architecture with active illumination for sensor network applications. An event-based CMOS imager is employed at the sensor level, to convert l...
Eugenio Culurciello, Thiago Teixeira, Andreas G. A...
RSP
2005
IEEE
207views Control Systems» more  RSP 2005»
16 years 24 days ago
Design Exploration and HW/SW Rapid Prototyping for Real-Time System Design
Embedded signal processing systems are usually associated with real-time constraints and/or high data rates so that fully software implementation are often not satisfactory. In th...
Sylvain Huet, Emmanuel Casseau, Olivier Pasquier
VRML
2004
ACM
16 years 19 days ago
3TP: 3-D models transport protocol
This paper addresses the problem of streaming progressively compressed 3-D models over lossy networks. Out of all encoded packets that can be transmitted, we intelligently choose ...
Ghassan Al-Regib, Yucel Altunbasak
INFOCOM
2003
IEEE
16 years 15 days ago
Opportunistic Fair Scheduling over Multiple Wireless Channels
Abstract— Emerging spread spectrum high-speed data networks utilize multiple channels via orthogonal codes or frequency-hopping patterns such that multiple users can transmit con...
Yonghe Liu, Edward W. Knightly