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» The Fail-Heterogeneous Architectural Model
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166
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DAC
1999
ACM
16 years 8 months ago
LISA - Machine Description Language for Cycle-Accurate Models of Programmable DSP Architectures
Abstract { This paper presents the machine description language LISA for the generation of bitand cycle accurate models of DSP processors. Based on a behavioral operation descripti...
Stefan Pees, Andreas Hoffmann, Vojin Zivojnovic, H...
QOSA
2007
Springer
16 years 1 months ago
A Bayesian Model for Predicting Reliability of Software Systems at the Architectural Level
: Modern society relies heavily on complex software systems for everyday activities. Dependability of these systems thus has become a critical feature that determines which product...
Roshanak Roshandel, Nenad Medvidovic, Leana Golubc...
205
Voted
ISCA
2010
IEEE
199views Hardware» more  ISCA 2010»
15 years 12 months ago
A case for FAME: FPGA architecture model execution
Given the multicore microprocessor revolution, we argue that the architecture research community needs a dramatic increase in simulation capacity. We believe FPGA Architecture Mod...
Zhangxi Tan, Andrew Waterman, Henry Cook, Sarah Bi...
CCS
2005
ACM
16 years 20 days ago
A model and architecture for pseudo-random generation with applications to /dev/random
We present a formal model and a simple architecture for robust pseudorandom generation that ensures resilience in the face of an observer with partial knowledge/control of the gen...
Boaz Barak, Shai Halevi
IPPS
2006
IEEE
16 years 1 months ago
Timed automata based analysis of embedded system architectures
We show that timed automata can be used to model and to analyze timeliness properties of embedded system architectures. Using a case study inspired by industrial practice, we pres...
Martijn Hendriks, Marcel Verhoef