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ISPD
2003
ACM
132views Hardware» more  ISPD 2003»
16 years 10 days ago
Architecture and synthesis for multi-cycle communication
For multi-gigahertz designs in nanometer technologies, data transfers on global interconnects take multiple clock cycles. In this paper, we propose a regular distributed register ...
Jason Cong, Yiping Fan, Xun Yang, Zhiru Zhang
ISSS
1999
IEEE
168views Hardware» more  ISSS 1999»
15 years 11 months ago
Automatic Architectural Synthesis of VLIW and EPIC Processors
This paper describes a mechanism for automatic design and synthesis of very long instruction word (VLIW), and its generalization, explicitly parallel instruction computing rocesso...
Shail Aditya, B. Ramakrishna Rau, Vinod Kathail
MICRO
1999
IEEE
138views Hardware» more  MICRO 1999»
15 years 11 months ago
Dynamic 3D Graphics Workload Characterization and the Architectural Implications
Although PC-class 3D graphics hardware has made significant strides in the last several years, the underlying architectural design principles are still generally considered as a b...
Tulika Mitra, Tzi-cker Chiueh
CAISE
2008
Springer
15 years 9 months ago
On the Definition of Service Granularity and Its Architectural Impact
Service granularity generally refers to the size of a service. The fact that services should be large-sized or coarse-grained is often postulated as a fundamental design principle ...
Raf Haesen, Monique Snoeck, Wilfried Lemahieu, Ste...
AAAI
2000
15 years 8 months ago
ADVISOR: A Machine Learning Architecture for Intelligent Tutor Construction
We have constructed ADVISOR, a two-agent machine learning architecture for intelligent tutoring systems (ITS). The purpose of this architecture is to centralize the reasoning of a...
Joseph Beck, Beverly Park Woolf, Carole R. Beal