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» The Generalized A* Architecture
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183
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DATE
2008
IEEE
129views Hardware» more  DATE 2008»
16 years 1 months ago
Memory Technology for Extended Large-Scale Integration in Future Electronics Applications
Extending 2-D planar topologies in integrated circuits (ICs) to a 3-D implementation has the obvious benefits of reducing the overall footprint and average interconnection length,...
Dinesh Pamunuwa
187
Voted
EUROSSC
2007
Springer
16 years 1 months ago
Recognition of User Activity Sequences Using Distributed Event Detection
We describe and evaluate a distributed architecture for the online recognition of user activity sequences. In a lower layer, simple heterogeneous atomic activities were recognised ...
Oliver Amft, Clemens Lombriser, Thomas Stiefmeier,...
FPGA
2007
ACM
106views FPGA» more  FPGA 2007»
16 years 1 months ago
A synthesizable datapath-oriented embedded FPGA fabric
We present an architecture for a synthesizable datapathoriented Field Programmable Gate Array (FPGA) core which can be used to provide post-fabrication flexibility to a Systemon-...
Steven J. E. Wilton, Chun Hok Ho, Philip Heng Wai ...
MICRO
2006
IEEE
73views Hardware» more  MICRO 2006»
16 years 1 months ago
Merging Head and Tail Duplication for Convergent Hyperblock Formation
VLIW and EDGE (Explicit Data Graph Execution) architectures rely on compilers to form high-quality hyperblocks for good performance. These compilers typically perform hyperblock f...
Bertrand A. Maher, Aaron Smith, Doug Burger, Kathr...
SIGCOMM
2006
ACM
16 years 1 months ago
ROFL: routing on flat labels
It is accepted wisdom that the current Internet architecture conflates network locations and host identities, but there is no agreement on how a future architecture should distin...
Matthew Caesar, Tyson Condie, Jayanthkumar Kannan,...