The fabless model was traditionally enabled through clean interfaces – both in technical and business terms – between foundries and fabless semiconductor companies. However, w...
Thomas Hartung, Jim Kupec, Ana Hunter, Brad Paulse...
In this paper, we propose a novel technique on mining relationships in a sequential circuit to discover global constraints. In contrast to the traditional learning methods, our mi...
This paper describes how systems companies are adopting SystemC transaction level models for system on chip design and verification, and how these transaction level models are bei...
We present a new method for mathematically estimating the active unit power of functional units in modern microprocessors such as the Pentium 4 family. Our method leverages the ph...
Wei Wu, Lingling Jin, Jun Yang 0002, Pu Liu, Sheld...
This work presents a general methodology for estimating the performance of an HPC workload when running on a future hardware architecture. Further, it demonstrates the methodology...
Ilya Sharapov, Robert Kroeger, Guy Delamarter, Raz...