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DAC
2003
ACM
16 years 26 days ago
Low-power design methodology for an on-chip bus with adaptive bandwidth capability
This paper describes a low-power design methodology for a bus architecture based on hybrid current/voltage mode signaling for deep sub-micrometer on-chip interconnects that achiev...
Rizwan Bashirullah, Wentai Liu, Ralph K. Cavin III
DAC
2003
ACM
16 years 25 days ago
Test application time and volume compression through seed overlapping
We propose in this paper an extension on the Scan Chain Concealment technique to further reduce test time and volume requirement. The proposed methodology stems from the architect...
Wenjing Rao, Ismet Bayraktaroglu, Alex Orailoglu
ISLPED
2003
ACM
83views Hardware» more  ISLPED 2003»
16 years 25 days ago
Leakage power modeling and optimization in interconnection networks
Power will be the key limiter to system scalability as interconnection networks take up an increasingly significant portion of system power. In this paper, we propose an architec...
Xuning Chen, Li-Shiuan Peh
ISLPED
2003
ACM
86views Hardware» more  ISLPED 2003»
16 years 25 days ago
Exploiting compiler-generated schedules for energy savings in high-performance processors
This paper develops a technique that uniquely combines the advantages of static scheduling and dynamic scheduling to reduce the energy consumed in modern superscalar processors wi...
Madhavi Gopal Valluri, Lizy Kurian John, Heather H...
SIGSOFT
2003
ACM
16 years 25 days ago
Evaluating and improving the automatic analysis of implicit invocation systems
Model checking and other finite-state analysis techniques have been very successful when used with hardware systems and less successful with software systems. It is especially di...
Jeremy S. Bradbury, Jürgen Dingel