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DEXAW
2006
IEEE
116views Database» more  DEXAW 2006»
16 years 1 months ago
Architecture Evaluation for Distributed Auto-ID Systems
Auto-ID technologies allow capturing the time and location of products in the supply chain for tracking and tracing. This paves the way for a variety of business applications, suc...
Hong Hai Do, Jürgen Anke, Gregor Hackenbroich
ISCAS
2006
IEEE
108views Hardware» more  ISCAS 2006»
16 years 29 days ago
A low complexity hardware architecture for motion estimation
This paper tackles the problem of accelerating The rest of this paper is organised as follows: section II motion estimation for video processing. A novel architecture details relat...
Daniel Larkin, Vlenti. Muresan, Noel E. O'Connor
184
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MOBICOM
2006
ACM
16 years 28 days ago
Wide area ocean networks: architecture and system design considerations
Wide area ocean networks for monitoring and scientific exploratory purposes are in various stages of design; smallscale networks are already in various stages of deployment and te...
Sumit Roy, Payman Arabshahi, Dan Rouseff, Warren L...
CODES
2005
IEEE
16 years 17 days ago
An architectural level design methodology for embedded face detection
Face detection and recognition research has attracted great attention in recent years. Automatic face detection has great potential in a large array of application areas, includin...
Vida Kianzad, Sankalita Saha, Jason Schlessman, Ga...
183
Voted
ICCAD
2005
IEEE
98views Hardware» more  ICCAD 2005»
16 years 17 days ago
An architecture and a wrapper synthesis approach for multi-clock latency-insensitive systems
— This paper presents an architecture and a wrapper synthesis approach for the design of multi-clock systems-on-chips. We build upon the initial work on multi-clock latency-insen...
Ankur Agiwal, Montek Singh