4737 search results - page 227 / 948 » The LOGIC negotiation model |
211
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VTS
2005
IEEE
16 years 23 days ago
2005
IEEE
— A closed-form model for simulation and analysis of voltage transients caused by single-event upsets (SEUs) in logic circuits is described. A linear RC model, derived using a SP...
199
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BIRTHDAY
2010
Springer
15 years 8 months ago
2010
Springer
Stable models of logic programs have been studied by many researchers, mainly because of their role in the foundations of answer set programming. This is a review of some of the de...
182
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MTDT
2002
IEEE
16 years 3 days ago
2002
IEEE
The amount of memory being embedded on chip is growing rapidly. This strongly implies that memory Built-in-self-test (BIST) logic assumes utmost importance amongst all on chip sel...
166
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AIMSA
2008
Springer
16 years 1 months ago
2008
Springer
Integrated modeling of temporal and logical constraints is important for solving real-life planning and scheduling problems. Logical constrains extend the temporal formalism by rea...
184
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MSE
2002
IEEE
16 years 3 days ago
2002
IEEE
A composite multimedia object has specific timing relationships among the different types of component media. Coordinating the real-time presentation of information and maintaini...