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CAV
1998
Springer
175views Hardware» more  CAV 1998»
15 years 11 months ago
An ACL2 Proof of Write Invalidate Cache Coherence
As a pedagogical exercise in ACL2, we formalize and prove the correctness of a write invalidate cache scheme. In our formalization, an arbitrary number of processors, each with its...
J. Strother Moore
ACSC
2004
IEEE
15 years 11 months ago
On Evolving Fixed Pattern Strategies for Iterated Prisoner's Dilemma
Table 1 shows the payoff to player one. The same matrix also holds for player two. Player one can gain the maximum 5 points (T = 5) by defection if player two cooperates. However,...
Daniel Jang, Peter A. Whigham, Grant Dick
BMCBI
2010
149views more  BMCBI 2010»
15 years 7 months ago
S3DB core: a framework for RDF generation and management in bioinformatics infrastructures
Background: Biomedical research is set to greatly benefit from the use of semantic web technologies in the design of computational infrastructure. However, beyond well defined res...
Jonas S. Almeida, Helena F. Deus, Wolfgang Maass
IANDC
2008
114views more  IANDC 2008»
15 years 7 months ago
Generalizing the Paige-Tarjan algorithm by abstract interpretation
act Interpretation Francesco Ranzato and Francesco Tapparo Dipartimento di Matematica Pura ed Applicata, Universit`a di Padova, Italy The Paige and Tarjan algorithm (PT) for comp...
Francesco Ranzato, Francesco Tapparo
ET
2002
122views more  ET 2002»
15 years 6 months ago
Using At-Speed BIST to Test LVDS Serializer/Deserializer Function
LVDS is the acronym for Low-Voltage-DifferentialSignaling and is described in both the ANSI/TIA/EIA644 and IEEE 1596.3 standards. High performance yet Low Power and EMI have made ...
Magnus Eckersand, Fredrik Franzon, Ken Filliter