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ISCA
2007
IEEE
143views Hardware» more  ISCA 2007»
16 years 1 months ago
Interconnect design considerations for large NUCA caches
The ever increasing sizes of on-chip caches and the growing domination of wire delay necessitate significant changes to cache hierarchy design methodologies. Many recent proposal...
Naveen Muralimanohar, Rajeev Balasubramonian
TIME
2007
IEEE
16 years 1 months ago
Multilingual Extension of Temporal Expression Recognition Using Parallel Corpora
This paper presents the automatic extension of TERSEO to other languages, a knowledge-based system for the recognition and normalization of temporal expressions, originally develo...
Marcel Puchol-Blasco, Estela Saquete, Patricio Mar...
DAWAK
2007
Springer
16 years 1 months ago
Automating the Schema Matching Process for Heterogeneous Data Warehouses
Abstract. A federated data warehouse is a logical integration of data warehouses applicable when physical integration is impossible due to privacy policy or legal restrictions. In ...
Marko Banek, Boris Vrdoljak, A. Min Tjoa, Zoran Sk...
FPGA
2007
ACM
142views FPGA» more  FPGA 2007»
16 years 1 months ago
Parametric yield in FPGAs due to within-die delay variations: a quantitative analysis
Variations in the semiconductor fabrication process results in variability in parameters between transistors on the same die, a problem exacerbated by lithographic scaling. The re...
N. Pete Sedcole, Peter Y. K. Cheung
FSKD
2007
Springer
140views Fuzzy Logic» more  FSKD 2007»
16 years 1 months ago
QoS-Aware Web Service Selection by a Synthetic Weight
The selection of web services according to different quality of service (QoS) is one of the most important decision issues for which complex considerations are involved. In many c...
PengCheng Xiong, Yushun Fan