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MICRO
2009
IEEE
129views Hardware» more  MICRO 2009»
16 years 1 months ago
In-network coherence filtering: snoopy coherence without broadcasts
With transistor miniaturization leading to an abundance of on-chip resources and uniprocessor designs providing diminishing returns, the industry has moved beyond single-core micr...
Niket Agarwal, Li-Shiuan Peh, Niraj K. Jha
CASES
2009
ACM
16 years 1 months ago
An accelerator-based wireless sensor network processor in 130nm CMOS
Networks of ultra-low-power nodes capable of sensing, computation, and wireless communication have applications in medicine, science, industrial automation, and security. Over the...
Mark Hempstead, Gu-Yeon Wei, David Brooks
DSN
2008
IEEE
16 years 1 months ago
An integrated approach to resource pool management: Policies, efficiency and quality metrics
: The consolidation of multiple servers and their workloads aims to minimize the number of servers needed thereby enabling the efficient use of server and power resources. At the s...
Daniel Gmach, Jerry Rolia, Ludmila Cherkasova, Gui...
DATE
2007
IEEE
95views Hardware» more  DATE 2007»
16 years 1 months ago
Memory bank aware dynamic loop scheduling
In a parallel system with multiple CPUs, one of the key problems is to assign loop iterations to processors. This problem, known as the loop scheduling problem, has been studied i...
Mahmut T. Kandemir, Taylan Yemliha, Seung Woo Son,...
DSN
2007
IEEE
16 years 1 months ago
Utilizing Dynamically Coupled Cores to Form a Resilient Chip Multiprocessor
Aggressive CMOS scaling will make future chip multiprocessors (CMPs) increasingly susceptible to transient faults, hard errors, manufacturing defects, and process variations. Exis...
Christopher LaFrieda, Engin Ipek, José F. M...