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ISCAS
2005
IEEE
126views Hardware» more  ISCAS 2005»
16 years 1 months ago
A distributed FIFO scheme for on chip communication
— Interconnect delays are increasingly becoming the dominant source of performance degradation in the nano-meter regime, largely because of disturbances that result from parasiti...
Ray Robert Rydberg III, Jabulani Nyathi, Jos&eacut...
EMSOFT
2005
Springer
16 years 29 days ago
From multi-clocked synchronous processes to latency-insensitive modules
We consider the problem of synthesizing correct-by-construction globally asynchronous, locally synchronous (GALS) implementations from modular synchronous specifications. This in...
Jean-Pierre Talpin, Dumitru Potop-Butucaru, Julien...
PASTE
2004
ACM
16 years 25 days ago
Validation of assembler programs for DSPs: a static analyzer
Digital Signal Processors are widely used in critical embedded systems to pilot low-level, often critical functionalities. We describe a static analyzer based on abstract interpre...
Matthieu Martel
ISMIR
2004
Springer
144views Music» more  ISMIR 2004»
16 years 24 days ago
Towards Automatic Transcription of Australian Aboriginal Music
We describe a system designed for automatic extraction and segmentation of didjeridu and clapsticks from certain styles of traditional Aboriginal Australian music. For didjeridu, ...
Andrew Nesbit, Lloyd Hollenberg, Anthony Senyard
PATMOS
2004
Springer
16 years 23 days ago
Optimal Logarithmic Representation in Terms of SNR Behavior
This paper investigates the Signal-to-Noise Ratio (SNR) performance of the Logarithmic Number System (LNS) representation against the SNR performance of the fixed-point representa...
Panagiotis D. Vouzis, Vassilis Paliouras