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180
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ICCD
2004
IEEE
101views Hardware» more  ICCD 2004»
16 years 4 months ago
Increasing Processor Performance Through Early Register Release
Modern superscalar microprocessors need sizable register files to support large number of in-flight instructions for exploiting ILP. An alternative to building large register file...
Oguz Ergin, Deniz Balkan, Dmitry V. Ponomarev, Kan...
201
Voted
ICCAD
2006
IEEE
131views Hardware» more  ICCAD 2006»
16 years 4 months ago
High-level synthesis challenges and solutions for a dynamically reconfigurable processor
A dynamically reconfigurable processor (DRP) is designed to achieve high area efficiency by switching reconfigurable data paths dynamically. Our DRP architecture has a stand alone...
Takao Toi, Noritsugu Nakamura, Yoshinosuke Kato, T...
219
Voted
SOSP
2001
ACM
16 years 4 months ago
BASE: Using Abstraction to Improve Fault Tolerance
ing Abstraction to Improve Fault Tolerance MIGUEL CASTRO Microsoft Research and RODRIGO RODRIGUES and BARBARA LISKOV MIT Laboratory for Computer Science Software errors are a major...
Rodrigo Rodrigues, Miguel Castro, Barbara Liskov
259
Voted
SOSP
2007
ACM
16 years 4 months ago
Dynamo: amazon's highly available key-value store
Reliability at massive scale is one of the biggest challenges we face at Amazon.com, one of the largest e-commerce operations in the world; even the slightest outage has significa...
Giuseppe DeCandia, Deniz Hastorun, Madan Jampani, ...
213
Voted
TLDI
2009
ACM
108views Formal Methods» more  TLDI 2009»
16 years 4 months ago
Secure compilation of a multi-tier web language
Storing state in the client tier (in forms or cookies, for example) improves the efficiency of a web application, but it also renders the secrecy and integrity of stored data vul...
Ioannis G. Baltopoulos, Andrew D. Gordon
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